ANSYS Inc., has presented version 14.1.b2 of Totem, its a transistor-level power noise and reliability simulation platform for analog, mixed-signal and custom digital designs.
Totem’s core technologies include foundry-certified extraction and simulation engines embedded within a powerful GUI environment that enable layout-based result analysis and design fixing. The software can analyze large full-chip designs, including package and substrate parasitics with SPICE-level accuracy. It helps designers meet increasingly stringent power and reliability requirements for IPs and/or analog and custom designs.
Totem is used to validate and sign-off custom macros or IPs (analog, custom digital, memory) against static and dynamic voltage drop. It is also useful for power and signal electromigration (EM) requirements. Multiple foundries have certified ANSYS Totem for EM and electrostatic discharge (ESD) rules for advanced technology nodes (20/16/14 nm).
